What (who) is set-associative - definition

PROPERTY THAT DETERMINES HOW OPERATORS OF THE SAME PRECEDENCE ARE GROUPED IN THE ABSENCE OF PARENTHESES

Right associative operator; Right associative; Left-associative; Right-associative; Left associative; Left associativity; Right associativity

set associative cache

DESIGN DECISIONS AFFECTING PROCESSOR CACHE SPEEDS AND SIZES

Set-associative; Set associative; Fully associative; Full associative; Associative cache; Direct mapped cache; Set-associativity; Cache associativity; User:Snehalc/sandbox; Fully associative cache; Set associative cache; Cache Placement Policies; Direct-mapped cache

<architecture> A compromise between a direct mapped cache and a fully associative cache where each address is mapped to a certain set of cache locations. The address space is divided into blocks of 2^m bytes (the cache line size), discarding the bottom m address bits. An "n-way set associative" cache with S sets has n cache locations in each set. Block b is mapped to set "b mod S" and may be stored in any of the n locations in that set with its upper address bits as a tag. To determine whether block b is in the cache, set "b mod S" is searched associatively for the tag. A direct mapped cache could be described as "one-way set associative", i.e. one location in each set whereas a fully associative cache is N-way associative (where N is the total number of blocks in the cache). Performance studies have shown that it is generally more effective to increase the number of entries rather than associativity and that 2- to 16-way set associative caches perform almost as well as fully associative caches at little extra cost over direct mapping. (2004-10-18)

direct mapped cache

DESIGN DECISIONS AFFECTING PROCESSOR CACHE SPEEDS AND SIZES

<architecture> A cache where the cache location for a given address is determined from the middle address bits. If the cache line size is 2^n then the bottom n address bits correspond to an offset within a cache entry. If the cache can hold 2^m entries then the next m address bits give the cache location. The remaining top address bits are stored as a "tag" along with the entry. In this scheme, there is no choice of which block to flush on a cache miss since there is only one place for any block to go. This simple scheme has the disadvantage that if the program alternately accesses different addresses which map to the same cache location then it will suffer a cache miss on every access to these locations. This kind of {cache conflict} is quite likely on a multi-processor. See also fully associative cache, set associative cache.

fully associative cache

DESIGN DECISIONS AFFECTING PROCESSOR CACHE SPEEDS AND SIZES

A cache where data from any address can be stored in any cache location. The whole address must be used as the tag. All tags must be compared simultaneously (associatively) with the requested address and if one matches then its associated data is accessed. This requires an associative memory to hold the tags which makes this form of cache more expensive. It does however solve the problem of contention for cache locations (cache conflict) since a block need only be flushed when the whole cache is full and then the block to flush can be selected in a more efficient way. See also direct mapped cache, set associative cache.

Wikipedia

Operator associativity

In programming language theory, the associativity of an operator is a property that determines how operators of the same precedence are grouped in the absence of parentheses. If an operand is both preceded and followed by operators (for example, ^ 3 ^), and those operators have equal precedence, then the operand may be used as input to two different operations (i.e. the two operations indicated by the two operators). The choice of which operations to apply the operand to, is determined by the associativity of the operators. Operators may be associative (meaning the operations can be grouped arbitrarily), left-associative (meaning the operations are grouped from the left), right-associative (meaning the operations are grouped from the right) or non-associative (meaning operations cannot be chained, often because the output type is incompatible with the input types). The associativity and precedence of an operator is a part of the definition of the programming language; different programming languages may have different associativity and precedence for the same type of operator.

Consider the expression a ~ b ~ c. If the operator ~ has left associativity, this expression would be interpreted as (a ~ b) ~ c. If the operator has right associativity, the expression would be interpreted as a ~ (b ~ c). If the operator is non-associative, the expression might be a syntax error, or it might have some special meaning. Some mathematical operators have inherent associativity. For example, subtraction and division, as used in conventional math notation, are inherently left-associative. Addition and multiplication, by contrast, are both left and right associative. (e.g. (a * b) * c = a * (b * c)).

Many programming language manuals provide a table of operator precedence and associativity; see, for example, the table for C and C++.

The concept of notational associativity described here is related to, but different from, the mathematical associativity. An operation that is mathematically associative, by definition requires no notational associativity. (For example, addition has the associative property, therefore it does not have to be either left associative or right associative.) An operation that is not mathematically associative, however, must be notationally left-, right-, or non-associative. (For example, subtraction does not have the associative property, therefore it must have notational associativity.)

https://en.wikipedia.org/wiki/Operator associativity